aioscilloscope DHO800/900 MHO900 AI / MCP Hardware Our instrument Notes Changelog Open source FAQ
What is inside the scope
A reference for the hardware in Rigol's DHO800, DHO900 and MHO900: every chip, how they connect, the clocks and the data path. It gathers what the community has published and checks each claim against what we read on our own DHO924S and MHO934 while running our own software on them.
Inside the DHO800 / DHO900 RK3399, Zynq XC7Z015 on PCIe Gen2 ×2, one RT8847IQ ADC, four RT1642 front ends, the LMX2582 clock.
Inside the MHO900 Fudan FMK230T or Kintex-7 K160T on PCIe Gen2 ×4, two RT8847IQ ADCs, LMK04826, a DAC38J82 generator with its own MCU.
Inside the FPGA The blocks, the interfaces, the multiboot and file load, and the measured 23.8 µs re-arm and 41k frames/s ceiling.
CH1 How we label what we know
Verified on our unit: we read it ourselves, from a boot log, the live device tree, a register, a PCIe link or a bitstream's ID code.
Photo: we read the marking from someone else's published teardown photos.
Public: a published claim we have not confirmed yet, with a link.
Corrected: a published claim our evidence disagrees with, with both sides.
Unknown: nobody has shown it yet, and how we plan to find out.
We read and measure; we do not publish Rigol's code. Corrections and board photos are welcome at brady@aioscilloscope.com .
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Questions or want updates: brady@aioscilloscope.com
No Rigol scopes were harmed in the making of this firmware (a few were rebooted a lot).
Rigol, DHO and MHO are trademarks of their owner. NovaOS is independent software; no Rigol software is distributed.